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BIOS PostCodes

Intel Motherboards:

  • IBM POST I/O Ports
  • IBM POST Procedures
  • IBM XT BIOS (Port 60)
  • IBM PS/2 (Micro Channel) BIOS



Architecture Typical Computer Port
PC PC None
  AT 80
  PS/2 25,30 90,190
MCA PS/2 50 up 680, 3BC
EISA None None

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IBM POST Procedures:

CPU Perform register test on the CPU by writing data patterns to the registers and reading the results of the write
ROM BIOS Checksum The value of the bits inside the BIOS chip(s) is added to a preset value that should create a total value of 00
CMOS RAM RAM within the CMOS chip is tested by writing data patters tot he area and verifying that the data was stored correctly
DMA Test DMA chips by forcing control inputs to the CPU to an active state and verifying that the proper reactions occur
8042/8742 Keyboard Controller Test including Gate A20 and the reset command.  The buffer space is prepared and data is sent to the determined area via the keyboard controller to see if commands are received and executed correctly
Base 64K System RAM Perform a walking bit test on the first 64K of RAM so the BIOS vector area can be initialized.  Check for bad RAM chips or a data/address line
8259A PIC Determine if commands to interrupt CPU processes are carried out correctly.  Check the PIC, PIT, RTC, CMOS and Clock chips
8254 PIT Check that proper setup and hold times are given to the PIC for interrupts of the CPU processes.  Check the PIT or Clock chip
82385 Cache Controller This is normally responsible for cache and shadow memory
CMOS RAM Configuration Data Check information in CMOS RAM before further testing so any failures after this could also be down to the CMOS chip
CRT Controllers Test any video adapters listed in the CMOS
RAM above 64K perform walking bit pattern test on memory above 64K listed in CMOS
Keyboard Test interface to the keyboard including scan code stuck keys etc.
Pointing Device Test and initialize vector for any pointing devices found.  Failure to see a device may be down to the device itself but there may be a problem with the CMOS or 8042/8742
Diskette Drive A: Test and initialize the A: drive
Serial Interface Circuitry Test any RS232 devices found at the proper I/O address
Diskette Controllers In an A: drive has been found further testing is performed before proceeding to the bootloader.  This test includes reading the first sector of any diskette in the drive to see if a valid boot code is there
Fixed Disk Controllers Test and initialize any hard drives set in the CMOS including reading the first sector of the hard drive to see if a valid boot code exists

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IBM XT BIOS (Port 60):

00 or FF CPU register test failed
01 BIOS ROM checksum failed
02 System timer 1 failed
03 8237 DMA register Read/Write failed
04 Base 32K RAM failed

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01 CPU flag and register tested
02 BIOS ROM checksum tested
03 CMOS shutdown byte 0F tested
04 8254 PIT channel 0 tested
05 8254 PIT channel 1 tested
06 8237 DMA initialize registers test 0
07 8237 DMA initialize registers test 1
08 DMA page register tested
09 Memory refresh tested
0A Soft reset tested
0B 8042 keyboard controller reset
0C 8042 keyboard controller reset OK
0D 8042 keyboard controller reset
0E Memory tested
0F I/P buffer switch settings obtained
DD RAM error
11 Protected mode initialized
12 Protected mode registers tested
13 8259 PIC #2 initialized
14 Temporary Interrupt vectors setup
15 BIOS Interrupt vectors obtained
16 CMOS checksum and battery OK
17 Defective CMOS battery flag set
18 CMOS set checked
19 CMOS return address byte set
1A Temporary stack set
1B Segment address 01-0000, second 64K, tested
1C Memory size; See if 512K or 640K present
1D Segment address 10-000, over 640K, tested
1E Expansion memory set as is reported by the CMOS
1F Address lines 19-23 tested
20 Preparing to return to protected mode
21 Return from protected mode successful; 6845 video controller initialized and started
22 6845 video controller tested
23 EGA/VGA BIOS tested
24 8259PIC Read/Write mask register with 1's and 0's
25 Interrupt mask registers tested
26 Unexpected Interrupts checked for; Error 101 displayed
27 System board tested: POST logic
28 Unexpected NMI Interrupts tested for
29 8253 PIT timer tested
2A 8253 timer tested
2B 8253 timer initialized; System board error
2C 8253 timer Interrupt initialization; System board failure
2D 8042 keyboard controller checked for command
2F 8042 keyboard checked for warm boot
30 Shutdown return 2 set
31 Protected mode enabled
32 Address lines 0-15
33 Next block of 64K RAM tested
34 Real mode enabled
35 8042 keyboard controller tested
36 Check for keyboard error
38 8042 keyboard controller failed
3A 8042 keyboard controller initialized
3B Expansion ROM's checked for in 2K blocks
3C Floppy drive controller tested
3D Initialize the floppy drive controller
3E Initialize hard disk controller
3F Initialize parallel port
40 Hardware Interrupt enabled
41 System code at segment E0000h checked for
42 Exit to system code
43 Call to boot loader
44 Boot from fixed disk
45 Unable to boot from fixed disk; Boot to BASIC
81 Descriptor table built
82 Virtual mode started
90-B6 Memory and bootstrap testing done
F0 Data segment set
F2 Interrupts tested
F1 Exception Interrupts tested
F3 Verify 286 protected mode instructions (LDT/SDT and LTR/STR)
F4 Verify 286 protected mode instructions (Bound instruction)
F5 Verify 286 protected mode instructions (Push and pop)
F6 Verify 286 protected mode instructions (Access rights)
F7 Verify 286 protected mode instructions (RPL field adjusted)
F8 Verify 286 protected mode instructions (LAR function)
F9 Verify 286 protected mode instructions (LSL instruction)
FA Verify 286 protected mode instructions (Memory chip selected)

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IBM PS/2 (Micro Channel) BIOS:

00 CPU tested with patter FFAA0055
01 CPU 32 register tested
02 BIOS ROM checksum tested
03 System port 94 enabled and checked
04 POST registers, port 102 enabled and checked
05 POST registers port 96 enabled and tested
06 CMOS shutdown byte 0F tested
07 CMOS extended port 74-76 enabled and tested
08 DMA and page registers tested (ports 2, 18, 1A and 1C)
09 DMA initialized
0A Memory refresh tested
0B 8042 keyboard controller buffers tested (ports 61 and 64)
0C 8042 keyboard controller internal test (port 60)
0D 8042 keyboard controller internal test continued
0E 8042keyboard controller self test error
0F Memory sized and setup
10 First 512K base memory tested
11 Base memory error, system halted
12 Protected mode instructions tested; Keyboard commands tested
13 PIC Interrupt controller 1 (master) tested
14 PIC Interrupt controller 2 (slave) tested
15 Initialize 120 Interrupt vectors
16 Initialize 16 extended vectors
17 CMOS/RTC tested; CMOS byte 0D tested
18 CMOS/RTC checksum tested
19 CMOS/RTC battery tested
1A Check for soft or hard reset
1B Protected mode initialization
1C Protected mode stack set; Pointer to end of first 64K set
1D Low memory size tested in protected mode
1E Memory size information saved
1F Memory split address setup
20 Check for extended memory beyond 64MB
21 Test memory-address bus lines
22 Clear parity error and channel lock
23 Initialize interrupt 0
24 Check CMOS RAM validity
25 Write keyboard-controller command byte
40 Check valid CMOS RAM and video system
41 Display error code 160
42 Test registers in both interrupt controllers
43 Test interrupt controller registers
44 Test interrupt mask registers
45 Test NMI
46 NMI error has been detected
47 Test system timer 0
48 Check system speaker clock
49 Test system timer 0 count
4A Test system timer 1 count
4B Check if timer interrupt occurred
4C Test timer 0 for improper operation (too fast or too slow)
4D Verify timer interrupt 0
4E Check 8042 keyboard controller
4F Check for soft reset
50 Prepare for shutdown
51 Start protected mode test
52 Test memory in 64KB increments
53 Check if memory test done
54 Return to real mode
55 Test for regular or manufacturing mode
56 Disable the keyboard
57 Check for keyboard self test
58 Keyboard test passed
59 Test the keyboard controller
5A Configure the mouse
5B Disable the mouse
5C Initialize interrupt vectors
5D Initialize interrupt vectors
5E Initialize interrupt vectors
60 Save DDNIL status
61 Reset floppy drive
62 Test floppy drive
63 Turn floppy-drive motor off
64 Set up serial ports
65 Enable real time clock interrupt
66 Configure floppy drives
67 Configure hard drives
68 Enable system CPU arbitration
69 Scan for adapter ROM's
6A Verify serial and parallel ports
6B Set up equipment byte
6C Set up configuration
6D Set keyboard-typematic rate
6E Call Int. 19 boot loader

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Copyright © 1988 -  by Bob Hurt. All rights reserved. Bios Central is a trademark of Bob Hurt.

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