01 |
CPU test |
02 |
System I/O port test |
03 |
ROM checksum test |
05 |
DMA page register test |
06 |
Timer 1 test |
07 |
Timer 2 test |
08 |
RAM refresh test |
09 |
8/19 bit bus conversion
check |
0A |
Interrupt controller 1
test |
0B |
Interrupt controller 2
test |
0C |
Keyboard controller test |
0D |
CMOS RAM/RTC test |
0E |
Battery power test |
0F |
CMOS RAM checksum test |
10 |
CPU protected mode |
11 |
Display configuration test |
12 |
Display controller test |
13 |
Primary display error |
14 |
Extended CMOS test |
15 |
AT bus reset |
16 |
Initialize chipset registers |
17 |
Check for extension ROM's |
18 |
Internal memory address
test |
19 |
Remap memory |
1A |
Memory interleave mode
test |
1B |
Remap shadow memory |
1C |
Setup MRAM |
1D |
Expanded memory test |
1E |
AT memory error |
1F |
Internal memory error |
20 |
Minimum POST tests complete |
21 |
DMA controller 1 test |
22 |
DMA controller 2 test |
23 |
Timer 0 test |
24 |
Initialize internal controllers |
25 |
Unexpected interrupt |
26 |
Expected interrupt |
30 |
Switch to protected mode |
31 |
Size AT bus memory or size
external memory |
32 |
Address lines A16 to A23
test |
33 |
Internal memory test or
conventional memory test |
34 |
AT bus memory test or external
memory test |
38 |
Shadow ROM BIOS to RAM |
39 |
Shadow extension BIOS to
RAM |
40 |
Enable/disable keyboard |
41 |
Keyboard clock and data
test |
42 |
Keyboard reset |
43 |
Keyboard controller test |
44 |
A20 gate test |
50 |
Initialize interrupt table |
51 |
Enable timer interrupt |
60 |
Floppy controller/drive
test |
61 |
Hard disk controller test |
62 |
Initialize floppy drives |
63 |
Initialize hard drives |
70 |
Real time clock test |
71 |
Set real time clock |
72 |
Test parallel interfaces |
73 |
Test serial interfaces |
74 |
Check external ROM's |
75 |
Numeric coprocessor test |
76 |
Enable keyboard and RTC
interrupts (IRQ 9) |
F0 |
Display system startup
message |
F1 |
Check for ROM at E000h |
F2 |
Boot from floppy or hard
disk |
F3 |
Run setup program |
F4 |
Run password program |
FC |
DRAM type detection |
FD |
CPU register test |
01 |
CPU test 1: verify CPU
status bits |
02 |
Powerup check - Initialize
motherboard and chipset with default values; Check 8042 keyboard controller
buffer |
03 |
Clear 8042 keyboard controller
- send command AA, fail if status is not 2 output buffer full |
04 |
Reset 8042 keyboard controller |
05 |
Get8042 keyboard controller
manufacturing status |
06 |
Initialize motherboard
chipset; disable color/mono video; disable 8237 DMA controller; reset
80x87 coprocessor; initialize 8255 timer 1; clear DMA/page registers/CMOS
RAM shutdown byte |
07 |
CPU test 2; read/write/verify
CPU registers SS, SP, BP, with FF and 00 |
08 |
Initialize CMOS RAM/RTC |
09 |
Checksum 32K of BIOS ROM |
0A |
Initialize video interface;
initialize 6845 controller |
0B |
Test 8254 programmable
interrupt timer channel 0 |
0C |
Test 8254 programmable
interrupt timer channel 1 |
0D |
Test 8254 programmable
interrupt timer channel 2 |
0E |
Test CMOS RAM shutdown
byte |
0F |
Test extended CMOS RAM,
if present |
10 |
Test 8237 DMA controller
channel 0 |
11 |
Test 8237 DMA controller
channel 1 |
12 |
Test 8237 DMA controller
page registers |
13 |
Test 8741 keyboard controller
interface |
14 |
Test memory refresh toggle
|
15 |
Test first 64K of base
memory |
16 |
Set up interrupt tables
in low memory |
17 |
Set up video I/O operations |
18 |
(1 beep) Test MDA/CGA video
memory unless EGA/VGA adapter is found |
19 |
Test 8259 programmable
interrupt timer channel 1 |
1A |
Test 8259 programmable
interrupt timer channel 0 |
1B |
Test CMOS RAM battery level |
1C |
Test CMOS RAM checksum |
1D |
Set system memory size
parameters |
1E |
Size base memory 64K at
a time |
1F |
Test base memory found
from 64K to 640K |
20 |
Test stuck bit in 8259
programmable interrupt controller |
21 |
Test for stuck NMI bits |
22 |
Test 8259 programmable
interrupt controller functionality |
23 |
Test protected mode |
24 |
Size extended memory above
1MB |
25 |
Test all base and extended
memory found, except the first 64K |
26 |
Test protected mode exceptions |
27 |
Initialize shadow RAM and
move system BIOS and/or video BIOS into it if enabled by CMOS RAM
setup |
28 |
Detect and initialize Intel
8242/8248 chip |
29 |
Reserved |
2A |
Detect and initialize keyboard |
2B |
Detect and initialize floppy
drive |
2C |
Detect and initialize serial
ports |
2D |
Detect and initialize parallel
ports |
2E |
Detect and initialize hard
drive |
2F |
Detect and initialize coprocessor |
30 |
Reserved |
31 |
Detect and initialize adapter
ROM's |
BD |
Initialize Orvonton cache
controller, if present |
CA |
Initialize 386 Micronics
cache, if present |
CC |
Shutdown NMI handler |
EE |
Test for unexpected processor
exception |
FF |
Interrupt 19 boot loader |
01 |
Processor test #1 |
02 |
Determine type of POST
test |
03 |
Clear 8042 keyboard controller
interface |
04 |
Reset 8042 keyboard controller
interface |
05 |
Get 8042 keyboard controller
manufacturing status |
06 |
Initialize LSI onboard
chips |
07 |
Processor test #2 |
08 |
Initialize CMOS chip |
09 |
EPROM checksum for 32KB |
0A |
Initialize video interface |
0B |
Test 8254 programmable
interrupt timer channel 0 |
0C |
Test 8254 programmable
interrupt timer channel 1 |
0D |
Test 8254 programmable
interrupt timer channel 2 |
0E |
Test CMOS date and timer |
0F |
Test CMOS shutdown byte |
10 |
Test DMA channel 0 |
11 |
Test DMA channel 1 |
12 |
Test DMA page registers |
13 |
Test 8741 keyboard controller |
14 |
Test memory refresh toggle
circuits |
15 |
Test 1st 64KB of system
memory |
16 |
Setup interrupt vector
table |
17 |
Setup video I/O operations |
18 |
Test video memory |
19 |
Test 8259 programmable
interrupt controller channel 1 mask bits |
1A |
Test 8259 programmable
interrupt controller channel 2 mask bits |
1B |
Test CMOS battery level |
1C |
Test CMOS checksum |
1D |
Setup configuration byte
for CMOS |
1E |
Sizing system memory &
compare with CMOS |
1F |
Test found system memory |
20 |
Test stuck 8259's interrupt
bits |
21 |
Test stuck NMI bits |
22 |
Test 8259 programmable
interrupt controller functionality |
23 |
Test protected mode and
A20 gate |
24 |
Sizing extended memory
above 1MB |
25 |
Test found system/extended
memory |
26 |
Test exceptions in protected
mode |
27 |
Reserved |
2A |
POST_KEYBOARD |
2B |
POST_FLOPPY |
2C |
POST_COMM |
2D |
POST_PRN |
2E |
POST_DISK |
2F |
POST_MATH |
30 |
POST_EXCEPTION |
CC |
POST_NMI |
01 |
Processor test 1 |
02 |
Determine type of POST
test |
06 |
Initialize 8259 programmable
interrupt controller and 8237 DMA controller chips |
07 |
Processor test #2 |
09 |
EPROM checksum for 32KB |
0A |
Initialize video controller
6845 registers |
15 |
Test 1st 64K of system
memory |
16 |
Setup interrupt vector
table in 1st 64K |
17 |
Setup video I/O operations |
18 |
Test video memory |
19 |
Test 8259 programmable
interrupt controller channel 1 mask bits |
1A |
Test 8259 programmable
interrupt controller channel 2 mask bits |
1D |
Setup configuration byte
from CMOS |
1E |
Sizing system memory &
compare with CMOS |
1F |
Test found system memory |
20 |
Test stuck 8259's interrupt
bits |
21 |
Test stuck NMI bits |
22 |
Test 8259 interrupt functionality |
2A |
Initialize keyboard |
2B |
Initialize floppy controller
and drive |
2C |
Initialize COM ports |
2D |
Initialize LPT ports |
2F |
Initialize coprocessor |
31 |
Initialize option ROM's |
FF |
Interrupt 19 boot loader |
01 |
Processor test 1 |
02 |
Determine POST type |
03 |
Clear 8042 keyboard controller
interface |
04 |
Reset 8042 keyboard controller
interface |
05 |
Get 8042 keyboard controller
manufacturing status |
06 |
Initialize onboard LSI
chips |
07 |
Processor test 2 |
08 |
Initialize CMOS timer/real
time clock |
09 |
EPROM checksum |
0A |
Initialize video interface |
0B |
Test 8254 programmable
interrupt timer channel 0 |
0C |
Test 8254 programmable
interrupt timer channel 1 |
0D |
Test 8254 programmable
interrupt timer channel 2 |
0E |
Test CMOS shutdown byte |
0F |
Test extended CMOS |
10 |
Test DMA channel 0 |
11 |
Test DMA channel 1 |
12 |
Test DMA page registers |
13 |
Test keyboard controller
interface |
14 |
Test memory refresh toggle
circuits |
15 |
Test first 64KB of system
memory which is used by system BIOS |
16 |
Setup interrupt vector
table |
17 |
Video I/O operations |
18 |
Video memory test for CGA
and mono cards |
19 |
Test 8259 mask bits on
channel 1 |
1A |
Test 8259 mask bits on
channel 2 |
1B |
Check CMOS battery level |
1C |
Test the CMOS checksum
data at 2E and 2Fh |
1D |
Configuration of CMOS if
checksum good |
1E |
System memory size determined |
1F |
Tests memory from the top
of 64K to the top of memory |
20 |
Check for stuck 8259 interrupt
bits |
21 |
Check for stuck NMI interrupt
bits |
22 |
Check for 8259 functionality |
23 |
Verifies protected mode |
24 |
System memory size is determined
for extended memory |
25 |
Tests extended memory found
above using virtual 8086 paging mode and writing an FFFF/AA55/0000
pattern |
26 |
Protected mode exceptions |
27 |
Test cache controller(386/486)
or shadow RAM |
28 |
Set up cache controller
or 8042 keyboard controller |
29 |
Reserved |
2A |
Initialize keyboard and
controller |
2B |
Initialize floppy drive
and controller |
2C |
Detect and initialize serial
ports |
2D |
Detect and initialize parallel
ports |
2E |
Initialize hard drive and
controller |
2F |
Detect and initialize coprocessor |
30 |
Reserved |
31 |
Detect and initialize option
ROM's |
3B |
Initialize secondary cache
with Opti chipset (486 only) |
CC |
NMI handler shutdown |
EE |
Unexpected processor exception |
FF |
Interrupt 19 boot loader |
01 |
Processor test 1 |
02 |
Processor test 2 |
03 |
Calculate BIOS EPROM |
04 |
Test CMOS RAM interface |
05 |
Initialize chipset |
06 |
Test memory refresh |
07 |
Setup low memory |
08 |
Setup interrupt vector
table |
09 |
Test CMOS RAM checksum
and load default |
0A |
Initialize keyboard |
0B |
Initialize video interface |
0C |
Test video memory |
0D |
OEM specific; initialization
of motherboard chips required by OEM |
0E |
Reserved |
0F |
Test DMA controller 0 |
10 |
Test DMA controller 1 |
11 |
DMA page registers |
12 |
Reserved |
13 |
Reserved |
14 |
Test 8254 timer 0 counter
2 |
15 |
Verify 8259 programmable
interrupt controller channel 1 |
16 |
Verify 8259 programmable
interrupt controller channel 2 |
17 |
Test for stuck 8259 interrupt
bits |
18 |
Test 8259 functionality |
19 |
Test for NMI bits |
1A |
Reserved |
1B |
Reserved |
1C |
Reserved |
1D |
Reserved |
1E |
Reserved |
1F |
Set EISA mode |
20 |
Initialize and enable EISA
slot 0 |
21 |
Initialize and enable EISA
slot 1 |
22 |
Initialize and enable EISA
slot 2 |
23 |
Initialize and enable EISA
slot 3 |
24 |
Initialize and enable EISA
slot 4 |
25 |
Initialize and enable EISA
slot 5 |
26 |
Initialize and enable EISA
slot 6 |
27 |
Initialize and enable EISA
slot 7 |
28 |
Initialize and enable EISA
slot 8 |
29 |
Initialize and enable EISA
slot 9 |
2A |
Initialize and enable EISA
slot 10 |
2B |
Initialize and enable EISA
slot 11 |
2C |
Initialize and enable EISA
slot 12 |
2D |
Initialize and enable EISA
slot 13 |
2E |
Initialize and enable EISA
slot 14 |
2F |
Initialize and enable EISA
slot 15 |
30 |
Size base memory from 256K
to 640K and test |
31 |
Test extended memory |
32 |
If EISA mode flag set,
test EISA memory found during slot initialization |
33 |
Reserved |
34 |
Reserved |
35 |
Reserved |
36 |
Reserved |
37 |
Reserved |
38 |
Reserved |
39 |
Reserved |
3A |
Reserved |
3B |
Reserved |
3C |
Verify CPU can switch in
and out of protected, virtual 86 and 8086 page modes |
3D |
Check for mouse and initialize
if present |
3E |
Initialize cache controller |
3F |
Enable shadow RAM |
40 |
Reserved |
41 |
Initialize floppy drive
controller and drives |
42 |
Initialize hard drive controller
and hard drives |
43 |
Serial ports detected and
initialized |
44 |
Parallel ports detected
and initialized |
45 |
Coprocessor detected and
initialized |
46 |
Setup message print to
screen |
47 |
Boot speed set |
48 |
Reserved |
49 |
Reserved |
4A |
Reserved |
4B |
Reserved |
4C |
reserved |
4D |
Reserved |
4E |
If manufacturing POST loop
pin set, reboot, otherwise non-fatal error messages will be displayed |
4F |
Security check |
50 |
Write all CMOS values back
to CMOS RAM |
51 |
Preboot enabled |
52 |
Initialize ROM's between
C80000-EFFFF |
53 |
Initialize time value at
address 40 of BIOS |
55 |
Initialize DDNIL counter
to NULL's |
63 |
Boot attempt |
B0 |
Spurious interrupt occurred
in protected mode |
B1 |
Unclaimed NMI |
BF |
Program chipset |
C0 |
OEM specific |
C1 |
OEM specific |
C2 |
OEM specific |
C3 |
OEM specific |
C4 |
OEM specific |
C5 |
OEM specific |
C6 |
OEM specific |
C7 |
OEM specific |
C8 |
OEM specific |
C9 |
OEM specific |
D0 |
Debug |
D1 |
Debug |
D2 |
Debug |
D3 |
Debug |
D4 |
Debug |
D5 |
Debug |
D6 |
Debug |
D7 |
Debug |
D8 |
Debug |
D9 |
Debug |
DA |
Debug |
DB |
Debug |
DC |
Debug |
DD |
Debug |
DE |
Debug |
DF |
Debug |
E0 |
Reserved |
E1 |
Setup page 1 |
E2 |
Setup page 2 |
E3 |
Setup page 3 |
E4 |
Setup page 4 |
E5 |
Setup page 5 |
E6 |
Setup page 6 |
E7 |
Setup page 7 |
E8 |
Setup page 8 |
E9 |
Setup page 9 |
EA |
Setup page 10 |
EB |
Setup page 11 |
EC |
Setup page 12 |
ED |
Setup page 13 |
EE |
Setup page 14 |
EF |
Setup page 15 |
FF |
Boot via interrupt 19 if
no errors detected |
C0 |
Turnoff chipset cache |
01 |
Processor test 1 |
02 |
Processor test 2 |
03 |
Initialize chipset; Disable
NMI/PIE/UEL/SQWV, video, parity checking, DMA; Reset coprocessor;
Clear all page registers and CMOS shutdown byte; Initialize timer
0, 1 and 2 including EISA timer to known state; Initialize DMA controllers
0 and 1; Initialize interrupt controllers 0 and 1 and EISA extended
controllers |
04 |
Test memory refresh |
05 |
Blank video |
06 |
Reserved |
07 |
Test CMOS and battery status |
C1 |
Memory presence test |
C5 |
Early shutdown |
C6 |
Cache presence test |
08 |
Setup low memory |
09 |
Early cache initialization |
0A |
Setup interrupt vector
table; Initialize first 120 interrupt vectors with SPURIOUS_INT_HDLR
and initialize interrupts 00-FF according to INT_TBL |
0B |
Test CMOS RAM checksum |
0C |
Initialize keyboard |
0D |
Initialize video interface |
0E |
Test video memory |
0F |
Test DMA controller 0 |
10 |
Test DMA controller 1 |
11 |
Test DMA page registers |
12 |
Reserved |
13 |
Reserved |
14 |
Test 8254 timer 0 counter
2 |
15 |
Test 8259 1 mask bits |
16 |
Test 8259 2 mask bits |
17 |
Test for 8259 stuck interrupt
bits |
18 |
Test 8259 interrupt functionality |
19 |
Test for stuck NMI bits |
1A |
Display CPU clock |
1B |
Reserved |
1C |
Reserved |
1D |
Reserved |
1E |
Reserved |
1F |
Set EISA mode |
20 |
Enable slot 0 |
21 |
Enable slot 1 |
22 |
Enable slot 2 |
23 |
Enable slot 3 |
24 |
Enable slot 4 |
25 |
Enable slot 5 |
26 |
Enable slot 6 |
27 |
Enable slot 7 |
28 |
Enable slot 8 |
29 |
Enable slot 9 |
2A |
Enable slot 10 |
2B |
Enable slot 11 |
2C |
Enable slot 12 |
2D |
Enable slot 13 |
2E |
Enable slot 14 |
2F |
Enable slot 15 |
30 |
Size base and extended
memory |
31 |
Test base and extended
memory |
32 |
Test EISA extended memory |
33 |
Reserved |
34 |
Reserved |
35 |
Reserved |
36 |
Reserved |
37 |
Reserved |
38 |
Reserved |
39 |
Reserved |
3A |
Reserved |
3B |
Reserved |
3C |
Setup enabled |
3D |
Check for and initialize
mouse if present |
3E |
Setup cache controller |
3F |
Reserved |
BF |
Chipset initialization |
40 |
Display virus protect enable
or disable |
41 |
Initialize floppy controller
and drive's |
42 |
Initialize hard drive controller
and drive's |
43 |
Serial and parallel ports
detected and initialized |
44 |
Reserved |
45 |
Coprocessor detected and
initialized if present |
46 |
Reserved |
47 |
Reserved |
48 |
Reserved |
49 |
Reserved |
4A |
Reserved |
4B |
Reserved |
4C |
Reserved |
4D |
Reserved |
4E |
Manufacturing POST loop/display
messages |
4F |
Security check |
50 |
Write CMOS |
51 |
Preboot enable |
52 |
Initialize options ROM's
between C800 and EFFF |
53 |
Initialize time value in
40h BIOS area |
60 |
Setup virus protect |
61 |
Set boot speed |
62 |
Setup numlock |
63 |
Boot attempt |
B0 |
Spurious if interrupt occurs
in protected mode |
B1 |
Unclaimed NMI |
E1 |
Setup page 1 |
E2 |
Setup page 2 |
E3 |
Setup page 3 |
E4 |
Setup page 4 |
E5 |
Setup page 4 |
E6 |
Setup page 5 |
E7 |
Setup page 6 |
E8 |
Setup page 7 |
E9 |
Setup page 8 |
EA |
Setup page 9 |
EB |
Setup page 10 |
EC |
Setup page 11 |
ED |
Setup page 12 |
EE |
Setup page 13 |
EF |
Setup page 14 |
FF |
Boot from interrupt 19 |
C0 |
Turn off OEM specific cache;
Initialize standard devices: DMA controller (8237), Programmable interrupt
controller (8259), Programmable interval timer (8254), RTC chip |
C1 |
Auto detection on onboard
DRAM & cache |
C3 |
Test first 256K DRAM |
C5 |
Copy the BIOS from ROM
into E000FFFF shadow RAM |
01 |
Reserved |
02 |
Reserved |
03 |
Initialize EISA registers |
04 |
Reserved |
05 |
Keyboard controller setup;
enable keyboard interface |
06 |
Reserved |
07 |
Verifies CMOS basic read/write
functionality |
BE |
Program default values
into chipset according to the MODBINable Chipset Default Table |
09 |
Program configuration register
for Cyrix CPU according to MODBINable Cyrix Register Table; OEM specific
cache initialization |
0A |
Initialize first 32 interrupt
vectors; Issue CPUID instruction to identify CPU type |
0B |
Verify RTC; Detect bad
battery; Read CMOS data into BIOS stack area; PnP initializations
(PnP BIOS only): Assign CSN to PnP ISA card, create resource map from
ESCD; Assign I/O and memory for PCI devices (PCI BIOS only) |
0C |
Initialize BIOS data area |
0D |
Program chipsets value;
Measure CPU speed for display; Video initialization (If no display,
speaker beeps) |
0E |
Initialize APIC (multiprocessor
BIOS only); Test video RAM; Show display message |
0F |
DMA channel 0 test |
10 |
DMA channel 1 test |
11 |
DMA page registers test |
12 |
Reserved |
13 |
Reserved |
14 |
Test 8254 timer 0 counter
2 |
15 |
Test 8259 interrupt mask
bits for channel 1 |
16 |
Test 8259 interrupt mask
bits for channel 2 |
17 |
Reserved |
19 |
Test 8259 functionality |
1A |
Reserved |
1B |
Reserved |
1C |
Reserved |
1D |
Reserved |
1E |
Execute EISA initialization
if NVM is good |
1F |
Reserved |
20 |
Reserved |
21 |
Reserved |
22 |
Reserved |
23 |
Reserved |
24 |
Reserved |
25 |
Reserved |
26 |
Reserved |
27 |
Reserved |
28 |
Reserved |
29 |
Reserved |
30 |
Size base and extended
memory |
31 |
Test base memory from 256K
to 640K; Test extended memory from 1MB to the top of memory |
32 |
Display Award Plug &
Play BIOS Extension message; Program super I/O chipset |
33 |
Reserved |
34 |
Reserved |
35 |
Reserved |
36 |
Reserved |
37 |
Reserved |
38 |
Reserved |
39 |
Reserved |
3A |
Reserved |
3B |
Reserved |
3C |
Set flag to allow access
to CMOS setup |
3D |
Initialize keyboard; Initialize
PS/2 mouse |
3E |
Initialize L2 cache |
3F |
Reserved |
40 |
Reserved |
BF |
Program chipset values
according to setup |
41 |
Initialize floppy controller
and floppy drives |
42 |
Initialize hard drive controller
and hard drives |
43 |
initialize serial and parallel
ports in PnP BIOS |
44 |
Reserved |
45 |
Initialize coprocessor |
46 |
Reserved |
47 |
Reserved |
48 |
Reserved |
49 |
Reserved |
4A |
Reserved |
4B |
Reserved |
4C |
Reserved |
4D |
Reserved |
4E |
Error messages displayed
if detected (F1 displayed to continue) |
4F |
Ask for password if needed;
Energy star logo displayed if Green BIOS |
50 |
Write all CMOS values currently
in the BIOS stack back to the CMOS |
51 |
Reserved |
52 |
Initialize ISA ROM's; Assign
IRQ's to any PCI devices, initialize PCI ROM's; PnP initializations;
Shadow RAM setup; Parity setup; Power management initialized |
53 |
Serial and parallel ports
initialized for non-PnP BIOS |
54 |
Reserved |
55 |
Reserved |
56 |
Reserved |
57 |
Reserved |
58 |
Reserved |
59 |
Reserved |
5A |
Reserved |
5B |
Reserved |
5C |
Reserved |
5D |
Reserved |
5E |
Reserved |
5F |
Reserved |
50 |
Virus protection setup
for boot sector if enabled |
61 |
L2 cache enabled; Boot
up speed according to setup; Chipset initialization finalized; Power
Management finalized; Show system configuration table |
62 |
Setup time/date according
to setup values; Program the numlock, typematic rates, and typematic
speeds according to setup |
63 |
ESCD updated if changed
to BIOS made; Clear memory that may be used; Bot from interrupt 19 |
FF |
Boot |