02 |
Verify real
mode |
12 |
Restore processor
control word during warm boot (only occurs on warm boot) |
24 |
Set ES segment
register to 4GB |
04 |
Get processor
type |
06 |
Initialize
system hardware |
18 |
8254 timer
initialization |
08 |
Initialize
PCIset registers with initial POST values |
C4 |
Initialize
system flags in CMOS |
11 |
Load alternate
registers with initial POST values |
0E |
Initialize
I/O |
0C |
Initialize
caches to initial POST values |
16 |
BIOS ROM
checksum |
17 |
Turn cache
off |
28 |
Autosize
DRAM |
2A |
Clear 512KB
base RAM |
2C |
RAM failure
on address line xxxx |
2E |
RAM failure
on data bits xxxx of low byte of memory bus (1st 4Meg) |
2F |
Initialize
L2 cache if enabled in CMOS |
38 |
Shadow system
BIOS ROM |
20 |
Test DRAM
refresh |
29 |
Post Memory
Manager initialization (PMM) |
33 |
Post Dispatch
Manager initialization |
34 |
Test CMOS |
C1 |
Post error
manager initialization |
09 |
Set IN POST
flag |
0A |
Initialize
processor registers and processor microcode |
3A |
Autosize
cache |
0B |
Enable processor
cache |
0F |
Initialize
the local bus IDE (not used anymore but here for Phoenix standard) |
10 |
Initialize
Power Management (APM not used in L440GX+) |
14 |
Initialize
keyboard controller |
1A |
8237 DMA
controller initialization |
1C |
Reset programmable
interrupt controller (PIC) |
22 |
Test 8742
keyboard controller |
32 |
Read processor
bus-clock frequency and compute boot processor speed |
67 |
Initialize
and register via SMM through APIC bus |
69 |
Initialize
SMI handler for all processors |
00 |
Wait for
secondary processor to execute init SMI handler |
F4 |
Exit SMI
handler (secondary processor executed halt in SMI) |
3C |
Configure
advanced PCIset registers and reset coprocessor |
3D |
Load alternate
registers with CMOS values |
42 |
Initialize
interrupt vectors |
46 |
Check ROM
copyright notice |
45 |
Initialize
all pre-PnP devices |
49 |
Initialize
PCI bus and devices (also read ESCD and allocate resources) |
48 |
Check video
configuration against CMOS (VGA or MDA) |
4A |
Initialize
all video adapters in system |
4C |
Shadow video
BIOS ROM |
24 |
Put processor
in big real mode (flat mode memory addressing - up to 4GB) |
59 |
Post display
manager initialization (video screen error codes now visible) |
22 |
Reset and
test keyboard first try (only warm reset) |
52 |
Reset and
test keyboard controller (both warm and cold reset) |
54 |
Set key click
if enabled |
76 |
Enable keyboard |
58 |
Test for
unexpected interrupts |
4B |
QuietBoot
start (not used in L440GX+) |
4E |
Display copyright
notice |
50 |
Display processor(s)
type and speed |
51 |
EISA init
(not used in L440GX+) |
5A |
Display prompt
"Press F2 to enter SETUP" |
5B |
Disable processor
L1 cache for memory test |
5C |
Test RAM
between 512KB and 640KB |
60 |
Test extended
memory (4MB to top of memory) |
62 |
Test extended
memory address lines |
64 |
Jump to UserPatch1 |
66 |
Configure
advanced cache registers |
68 |
Enable external
and processor caches |
6A |
Display external
cache size |
6C |
Display shadow
message |
6E |
Display non-disposable
segments |
70 |
Display error
messages to video |
72 |
Check for
configuration errors |
74 |
Test real
time clock |
7C |
Setup hardware
interrupt vectors |
7E |
Test coprocessor
if present |
80 |
Not used |
88 |
Initialize
BIOS Data Area, time-outs for detecting parallel, serial and HDD
controller. Clear CMOS shutdown flag |
8A |
Initialize
Extended BIOS Data Area |
81 |
Late POST
core initialization of devices |
87 |
Configure
MCD devices |
85 |
Initialize
and detect PC compatible PnP ISA devices (parallel, serial, etc..) |
82 |
Not used |
84 |
Clear interrupts
from COM port detection |
86 |
Console redirection
initialized |
83 |
Configure
onboard hard disk controller |
89 |
Enable NMI |
8C |
Initialize
floppy controller |
90 |
Initialize
and detect hard disks |
8B |
Detect and
test for mouse and auxiliary device on keyboard controller |
95 |
Install CD-ROM
for boot |
92 |
Jump to UserPatch2 |
C5 |
Initialize
GPNV areas in DMI |
98 |
Search for
option ROMs. One long, two short beeps on checksum failure of an
option ROM |
93 |
Scan for
User Flash ROMs. MP Table initialization (wake up secondary processor
and halt it) |
9C |
Setup Power
Management (not used) |
9D |
Enable security |
9E |
Enable hardware
interrupts |
A0 |
Set time
of day |
A2 |
Check key
lock |
A4 |
Initialize
typematic rate |
C2 |
Initialize
DMI tables |
C3 |
Log post
errors with POST error manager and to SEL in BMC. Update VID bits
and memory presence to BMC. Display and FRB errors (watchdog time-outs,
bits or processor failures) |
A8 |
Erase F2
prompt |
AA |
Scan for
F2 keystroke |
AC |
Initialize
EMP port if selected. Remove COM2 from BDA if EMP is enabled. Enter
SETUP |
AE |
Clear IN
POST flag |
B0 |
Turn on secure
boot if enabled (secure front panel, blank video, floppy write protect).
Check for errors |
B2 |
POST done
- prepare to boot Operating System |
B4 |
One short
beep before boot |
B5 |
Display QuietBoot
(not used) |
BE |
Clear screen |
B6 |
Check password
(optional) |
BC |
Clear parity
checkers |
BA |
Not used |
B7 |
ACPI configuration
(table configuration in memory and BDA) |
BD |
Display MultiBoot
menu if ESC is hit |
BF |
Display system
config summary (if enabled in CMOS) |
8F |
Get total
# of hard drives and put in BDA |
91 |
Program IDE
hard drives (timing, PIO modes, etc...) |
9F |
Save total
# of hard drives (SCSI and ATA) in BDA |
97 |
Fixup MP
table (checksum) |
99 |
Check SMART
hard drive |
C7 |
Prepare to
boot to OS. Clean up graphics and PMM areas |
C0 |
Try to boot
with Int19h. Return to video mode 3, disable PMM, return to real
mode, disable gate A20, clears system memory, resets stack, invokes
Int19h |
D0 |
Interrupt
handler error |
D2 |
Unknown interrupt
error |
D4 |
Pending interrupt
error |
D6 |
Initialize
option ROM error |
D8 |
Shutdown
error |
DA |
Extended
Block Move |
DC |
Shutdown
10 error |